Description: 伪随机序列发生器的vhdl算法
设计一个伪随机序列发生器,采用的生成多项式为1+X^3+X^7。要求具有一个RESET端和两个控制端来调整寄存器初值(程序中设定好四种非零初值可选)。
-Pseudo-random sequence generator algorithm VHDL design of a pseudo-random sequence generator, using the generation polynomial for the 1+ X ^ 3+ X ^ 7. RESET has a client request and the two control registers client to adjust the initial value (procedures set of four non-zero initial value optional). Platform: |
Size: 1024 |
Author:文成 |
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Description: 用VHDL语言编写的实现交织编码和解交织功能的代码。交织采用按行写入,按列读出的方法实现。主要包括:信源信号产生(20位的m序列),交织器,解交织器。为实现流水线的操作,采用了两个交织器和两个解交织器,当一个写入数据的时候,另一个读出数据。-Implementation using VHDL language features Interleaved Coded deinterleave code. Intertwined with by line write, read out by column method implementation. Include: source signal generator (20-bit m sequence), interleaver, interleaver solution. For the realization of the pipeline operation, using two solutions of the two interleaver and interleaver, when a write data, another read data. Platform: |
Size: 36864 |
Author:李修函 |
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Description: 这是一个工具,使用MATLAB代码为一个由阿尔伯塔大学的Siting Liu开发的硬件Sobol序列生成器生成VHDL文件。(This is a tool that uses MATLAB code to generate VHDL files for a hardware Sobol sequence generator developed by Siting Liu at the University of Alberta.) Platform: |
Size: 2048 |
Author:不是py的PY |
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